18
LTC4221
4221fa
The LTC4221 can also be configured to automatically retry
after a fault condition. As shown in Figure 10, the FAULT
(which has an internal 3.8糀 pull-up current source) and
both ON pins are connected together. The timing diagram
in Figure 11 illustrates a simultaneous start-up sequence
where the LTC4221 is powered up into a load overcurrent
condition on channel 1. After the slow comparators are
armed at the end of the start-up cycle at time point 4, slow
comparator 1 immediately trips and FILTER ramps up.
FILTER ramps past its high threshold at time point 6 and
trips the circuit breaker. FAULT and both ON pins are
pulled low by an internal N-channel MOSFET and over-
shoots below the 0.4V reset threshold of the ON1 pin.
Once ON1 < 0.4V for more than 15約, the internal fault
APPLICATIO S I FOR ATIO
U
U
U
+
V
CC1
ON1
SENSE1
ON2
FAULT
R
F2
15k
LTC4221*
GATE1
FB1
4221 F10
1
16
7
10
9
C
TIMER
1糉
GND
TIMER
R
F1
56k
V
OUT1
3.3V
5A
V
OUT2
2.5V
5A
Q1
IRF7413
R
SENSE1
0.004?/DIV>
C
LOAD1
8
C
FILTER
1nF
FILTER
Z1
Q2: 2N7002LT1
Z1: SMAJ10
* ADDITIONAL DETAILS
OMITTED FOR CLARITY
R
X1
10?/DIV>
C
X1
100nF
C
ON1
0.47糉
R1
1M
LONG
V
CC1
LONG
PCB EDGE
CONNECTOR
(MALE)
SHORT
BACKPLANE
CONNECTOR
(FEMALE)
LONG
V
CC2
FAULT
Figure 10. Using FAULT to Configure Autoretry
2
1
3
4 5
6 7
8
9
20糀
ELECTRONIC CIRCUIT BREAKER ARMED
20糀
2糀
1.8糀
0.4V
0.4V
0.851V
V
FILTER(TH)
V
SENSE(FC)
V
SENSE(SC)
9.5糀
105糀
1.9糀
V
TMR(L)
V
TMR(H)
0.851V
TIMER
ONn, FAULT
FILTER
GATE1
SENSE1
V
OUT1
RESET
CHANNEL
START-UP
FILTER
RAMP
RESET
t
ON
t
INITIAL
OFF
INITIAL
TIMING
4221 F11
INITIAL TIMING
t
INITIAL
t
STARTUP
t
FILTER
SLOW COMPARATORS ARMED
Figure 11. Autoretry Timing Waveforms
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